R
Virtex-II Platform FPGAs: Pinout Information
Table 7: FG456/FGG456 BGA — XC2V250, XC2V500, and XC2V1000
Bank
Pin Description
IO_L93N_0
Pin Number
B10
No Connect in XC2V250
No Connect in XC2V500
0
0
0
0
0
0
0
0
IO_L93P_0
A10
IO_L94N_0/VREF_0
IO_L94P_0
E11
F11
IO_L95N_0/GCLK7P
IO_L95P_0/GCLK6S
IO_L96N_0/GCLK5P
IO_L96P_0/GCLK4S
D11
C11
B11
A11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
IO_L96N_1/GCLK3P
IO_L96P_1/GCLK2S
IO_L95N_1/GCLK1P
IO_L95P_1/GCLK0S
IO_L94N_1
F12
F13
E12
D12
C12
B12
A13
B13
C13
D13
E13
E14
A14
B14
C14
D14
A15
B15
C15
D15
F14
E15
A16
B16
C16
IO_L94P_1/VREF_1
IO_L93N_1
IO_L93P_1
IO_L92N_1
IO_L92P_1
IO_L91N_1
IO_L91P_1/VREF_1
IO_L54N_1
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
IO_L54P_1
IO_L52N_1
IO_L52P_1
IO_L51N_1/VREF_1
IO_L51P_1
IO_L49N_1
IO_L49P_1
IO_L24N_1
NC
NC
NC
NC
NC
IO_L24P_1
IO_L22N_1
IO_L22P_1
IO_L21N_1/VREF_1
DS031-4 (v3.5) November 5, 2007
Product Specification
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