Product Preview
WM8983
Figure 32 Outputs OUT3 and OUT4
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R49
Output control
3
OUT3BOOST
0
0 = OUT3 output gain = -1;
DC = AVDD1 / 2
1 = OUT3 output gain = +1.5
DC = 1.5 x AVDD1 / 2
0 = OUT4 output gain = -1;
DC = AVDD1 / 2
4
8
OUT4BOOST
BUFDCOPEN
0
1 = OUT4 output gain = +1.5
DC = 1.5 x AVDD1 / 2
R1
0
Dedicated buffer for DC level shifting
output stages when in 1.5x gain
boost configuration.
Power
management
1
0=Buffer disabled
1=Buffer enabled (required for 1.5x
gain boost)
Table 39 OUT3 and OUT4 Boost Stages Control
OUT3BOOST/
OUTPUT
STAGE GAIN
OUTPUT DC
LEVEL
OUTPUT STAGE
CONFIGURATION
OUT4BOOST
0
1
1x
AVDD1/2
Inverting
1.5x
1.5xAVDD1/2
Non-inverting
Table 40 OUT3 and OUT4 Output Boost Stage Details
PP Rev 1.1 August 2005
57
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