WM8961
Pre-Production
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
ADC digital volume update
Writing 1 to this bit will cause left and right ADC volumes to be updated
(LADCVOL and RADCVOL)
R22 (16h)
Right ADC
volume
8
ADCVU
0
ADC Right Channel Digital Volume.
FFh -> Efh: +17.625dB
EEh: +17.25dB
7:0
RADCVOL[7:0] 1100_0000
…… in steps of -0.375dB to
C0h : 0dB
BFh : -0.375dB
Beh: -0.75dB
….. in steps of -0.375dB to
02h: -71.25dB
01h: -71.625dB
00h: Digital Mute
Register 16h Right ADC volume
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
Enable auto shutdown of speaker driver on temperature overheat
condition
0 : Thermal Shutdown disabled
R23 (17h)
Additional
control(1)
8
TSDEN
1
1 : Thermal Shutdown enabled
(TSENSEN must be enabled for this function to work)
4
0
DMONOMIX
TOEN
0
0
DAC Mono Mix
0 : Stereo
1 : Mono (Mono MIX output on enabled DAC)
Note: Only one DAC can be enabled when using this feature
Slow clock enable for volume update timeout
Register 17h Additional control(1)
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R24 (18h)
Additional
control(2)
3
TRIS
0
Tristates ADCDAT and switches LRC and BCLK to inputs.
0 : ADCDAT is an output; LRC and BCLK are inputs (slave mode) or
outputs (master mode)
1 : ADCDAT is tristated; LRC and BCLK are inputs
Register 18h Additional Control (2)
PP, August 2009, Rev 3.1
w
91
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
