WM8961
Pre-Production
REGISTER BITS BY ADDRESS
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
Write 1 to do a volume update on inputs
R0 (00h)
Left Input
volume
8
7
IPVU
0
1
Left Input PGA Analogue Mute
1 = Enable Mute
LINMUTE
0 = Disable Mute
Note: IPVU must be set to un-mute.
Zero cross enable. Requires separate register write before volume setting.
0 : Disable zero cross on left input PGA
6
LIZC
0
1 : Enable zero cross
Left input PGA gain, 0.75dB steps
000000 : -23.25dB
000001 : -22.50dB
…
5:0
LINVOL[5:0]
01_1111
011111 : 0dB
…
111110 : 23.25dB
111111 : 24.00dB
Register 00h Left Input volume
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
DEVICE_ID [3:0]
Reading from this register will indicate device family ID
Device ID: [3:0]
0000 = 1801
R1 (01h)
Right Input
volume
15:12
0000
0001-1111 : unused
Device Revision: [2:0]
000 = Rev A
11:9
CHIP_REV[2:0]
010
001 = Rev B
010 = Rev C
011-111 : unused
Write 1 to do a volume update on inputs
8
7
IPVU
0
1
Right Input PGA Analogue Mute
1 = Enable Mute
RINMUTE
0 = Disable Mute
Note: IPVU must be set to un-mute.
Zero cross enable. Requires separate register write before volume
6
RIZC
0
setting.
0 : Disable
1 : Enable
Right input PGA gain, 0.75dB steps
000000 : -23.25dB
000001 : -22.50dB
…
5:0
RINVOL[5:0]
01_1111
011111 : 0dB
…
111110 : 23.25dB
111111 : 24.00dB
Register 01h Right Input volume
PP, August 2009, Rev 3.1
w
83
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
