WM8805
Production Data
PARITY BIT
This bit maintains even parity for data as a means of basic error detection. It is generated by the
transmitter.
REGISTER
ADDRESS
BIT
LABEL
CHANNEL
STATUS
BIT
DEFAULT
DESCRIPTION
R18
SPDTX1
12h
0
CON/PRO
0
0
Use Of Channel Status Block
0 = Consumer Mode
1 = Professional Mode (not supported by
WM8805).
1
2
AUDIO_N
CPY_N
1
0
0
Linear PCM Identification.
0 = S/PDIF transmitted data is audio PCM.
1 = S/PDIF transmitted data is not audio
PCM.
2
Copyright Information
0 = Transmitted data has copyright asserted.
1 = Transmitted data has no copyright
assertion.
5:3
DEEMPH[2:0]
5:3
000
Additional Format Information
000 = Data from Audio interface has no pre-
emphasis.
001 = Data from Audio interface has pre-
emphasis.
All other modes are reserved and should not
be used.
7:6
CHSTMODE
[1:0]
7:6
00
Channel Status Mode
00 = Only valid mode for consumer
applications.
Table 34 S/PDIF Transmitter Channel Status Bit Control Register 1
REGISTER
ADDRESS
BIT
LABEL
CHANNEL
STATUS
BIT
DEFAULT
DESCRIPTION
Category Code
R19
SPDTX2
13h
7:0
CATCODE
[7:0]
15:8
00000000
Refer to S/PDIF specification (IEC 60958-3)
for full details.
0x00h indicates “general” mode.
Table 35 S/PDIF Transmitter Channel Status Bit Control Register 2
PD Rev 4.1 September 07
32
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
