WM8777
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REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
LC attack (gain ramp-down) time
(1Fh)
3:0
ATK[3:0]
0010
ALC Control 3
ALC mode
Limiter Mode
0000 = 250us
0000 = 8.4ms
0001 = 16.8ms
0001 = 500us… 0010
= 1ms
0010 = 33.6ms…
(time doubles with
every step)
(time doubles with
every step)
1010 or higher =
8.6s
1010 or higher =
256ms
7:4
DCY[3:0]
0011
LC decay (gain ramp-up) time
ALC mode
Limiter mode
0000 = 1.2ms
0001 = 2.4ms
0010 = 4.8ms
0000 = 33.5ms
0001 = 67.2ms
0010 = 134.4ms
….(time doubles for ….(time doubles for
every step)
every step)
1010 or higher =
34.41ms
1010 or higher =
1.2288s
8
FDECAY
0
Frequency dependant decay (limiter only)
0 = Frequency dependent delay disabled
1 = Frequency dependent delay enabled
DCY
20kHz input (or
disabled)
1kHz input
0000
0001
0010
……
1.2ms
2.4ms
4.8ms
……
24ms
28ms
96ms
……
1010 or
higher
1.2288ms
24.576s
Table 74 ALC Attack and Decay Registers
TRANSIENT WINDOW (LIMITER ONLY)
To prevent the limiter responding to short duration high amplitude signals (such as hand-claps in a
live performance), the limiter has a programmable transient window preventing it responding to
signals above the threshold until their duration exceeds the window period. The Transient window is
set in register TRANWIN.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
(21h)
6:4
TRANWIN
[2:0]
010
Length of Transient Window
000 = 0us (disabled)
001 = 62.5us
Limiter Control
010 = 125us
…..
111 = 4ms
Table 75 Transient Window Register
ZERO CROSS
The PGA has a zero cross detector to prevent gain changes introducing noise to the signal. In ALC
mode the register bit ALCZC allows this to be turned on if desired.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
(1Eh)
7
ALCZC
0
ALC zero cross detection circuit.
0 = Zero cross detection disabled.
1 = Zero cross detection enabled.
(disabled)
ALC Control 2
Table 76 ALC Zero Cross Register
When the limiter is enabled the zero cross detector on the PGA is automatically enabled to ensure
that no noise is introduced during gain changes.
PP Rev 1.94 November 2004
70
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