WM8777
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ZERO FLAG OUTPUT
The WM8777 has a zero detect circuit for each DAC channel which detects when 1024 consecutive
zero samples have been input. Two zero flag outputs (ZFLAG1 and ZFLAG2) may be output through
the GPIO pins which may then be used to control external muting circuits. A ‘1’ on ZFLAG1 or
ZFLAG2 indicates a zero detect. The zero detect may also be used to automatically enable the DAC
mute by setting IZD. The zero flag output may be disabled by setting DZFM to 0000. The zero flag
signal for a DAC channel will only be a ‘1’ if that channel is disabled as an input to the output
summing stage.
REGISTER ADDRESS
(17h)
BIT
LABEL
DEFAULT
DESCRIPTION
7:4
DZFM[3:0]
0000
Selects the ouput for ZFLG1 and
ZFLG2 pins (see Table 53).
DAC Control
1 = indicates 1024 consecutive
zero input samples on the
channels selected
0 = indicates at least one of
selected channels has non zero
sample in last 1024 inputs
Table 52 DZFM Register
DZFM[3:0]
0000
ZFLAG1
ZFLAG2
Zero flag disabled
All channels zero
Left channels zero
Channel 1 zero
Channel 1 zero
Channel 1 zero
Channel 1 zero
Channel 2 zero
Channel 2 zero
Channel 3 zero
Channels 1-3 zero
Zero flag disabled
All channels zero
Right channels zero
Channels 2-4 zero
Channel 2 zero
Channel 3 zero
Channel 4 zero
Channel 3 zero
Channel 4 zero
Channel 4 zero
Channel 4 zero
Channels 2 and 3
zero
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
Channel 1 zero
1100
1101
1110
1111
Channel 1 left zero
Channel 2 left zero
Channel 3 left zero
Channel 4 left zero
Channel 1 right zero
Channel 2 right zero
Channel 3 right zero
Channel 4 right zero
Table 53 Zero Flag Output Select
INFINITE ZERO DETECT
Setting the IZD register bit will enable the internal infinite zero detect function:
REGISTER ADDRESS
(15h)
BIT
LABEL
DEFAULT
DESCRIPTION
2
IZD
0
Infinite zero detection circuit control
and automute control
DAC Attenuation Control
0 = Infinite zero detect automute
disabled
1 = Infinite zero detect automute
enabled
Table 54 IZD Register
With IZD enabled, applying 1024 consecutive zero input samples each stereo channel will cause that
stereo channels outputs to be muted. Mute will be removed as soon as any channel receives a non-
zero input.
PP Rev 1.94 November 2004
58
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
