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WM8777SEFT 参数 Datasheet PDF下载

WM8777SEFT图片预览
型号: WM8777SEFT
PDF下载: 下载PDF文件 查看货源
内容描述: 24位192KHZ AV接收机芯片 [24 BIT 192KHZ AV RECEIVER ON A CHIP]
分类和应用: 接收机
文件页数/大小: 102 页 / 1257 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8777  
Product Preview  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
Received Channel status bit 1  
(51h)  
0
AUDIO_N  
S/PDIF Status  
Register  
(read-only)  
0 = Data word represents audio PCM samples.  
1 = Data word does not represent audio PCM samples.  
1
2
PCM_N  
CPY_N  
Detects non-audio data from a 96-bit sync code, as  
defined in IEC-61937.  
0 = Sync code not detected.  
1 = Sync code detected – received data is not audio  
PCM.  
Recovered S/PDIF Channel status bit 2.  
0 = Copyright is asserted for this data.  
1 = Copyright is not asserted for this data.  
Note this signal is inverted and will cause an interrupt on  
logic 0.  
4:3  
SPDIF_MODE  
S/PDIF frequency mode.  
00: Mode not supported  
01: 88-96KHz  
10: 44-48KHz  
11: 32KHz  
Table 46 S/PDIF Rx Status Register  
Should the incoming S/PDIF sub-frame contain a PARITY error or a BIP error, it is assumed the sub-  
frame has become corrupted. These errors would normally be flagged, but if the error bits have been  
masked, the WM8777 will instead overwrite the recovered frame (i.e. both sub-frames) with either  
all-zeros or the last data sample (depending on how FILLMODE has been set). When the flags are  
unmasked and an error is detected, the data is allowed to pass, albeit still corrupted.  
Similarly, if VALIDITY is detected as 1, it is assumed the data within the S/PDIF frame is invalid. If  
VALIDITY is masked, then data is overwritten depending on FILLMODE, else VALIDITY is flagged  
and the (invalid) data is allowed to pass. (Note1: ALWAYSVALID must be set to 0, else the  
recovered VALIDITY bit will be ignored). (Note 2: For the S/PDIF Receiver to S/PDIF transmitter  
path, only masked VALIDITY errors will cause data to be overwritten – PARITY and BIP errors have  
no effect).  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
(49h)  
7:0  
MASK[7:0]  
0000000  
When a lag is masked, it does not update the Error  
Register or contribute to the interrupt pulse. 0 =  
unmask, 1 = mask.  
S/PDIF  
Receiver  
Error Mask  
MASK[0] = mask control for UNLOCK  
MASK[1] = mask control for VALIDITY  
MASK[2] = mask control for PARITYERR  
MASK[3] = mask control for BIP  
MASK[4] = mask control for AUDIO_N  
MASK[5] = mask control for PCM_N  
MASK[6] = mask control for CPY_N  
MASK[7] = mask control for SPDIF_MODE  
(40h)  
6
7
FILLMODE  
Determines what SPDIF_RX should do if the validity bit  
indicates invalid data:  
0
0
S/PDIF  
Receiver  
Input Selector  
0 = Data from SPDIF_RX remains static at last valid  
sample.  
1 = Data from SPDIF_RX is output as all zeros.  
Used to override the recovered validity bit.  
0 = Use validity bit.  
ALWAYSVALID  
1 = Ignore validity bit.  
Table 47 S/PDIF Rx Error Mask Register  
PP Rev 1.94 November 2004  
54  
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