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WM8770SIFV 参数 Datasheet PDF下载

WM8770SIFV图片预览
型号: WM8770SIFV
PDF下载: 下载PDF文件 查看货源
内容描述: 24位, 192kHz的8声道编解码器,带有音量控制 [24-bit, 192kHz 8-Channel Codec with Volume Control]
分类和应用: 解码器编解码器
文件页数/大小: 52 页 / 555 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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Production Data  
WM8770  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
00000  
6:0  
L1A[6:0]  
1111111  
(0dB)  
Attenuation Data for Left Channel DACL1 in 1dB steps. See Table  
11  
Analogue  
Attenuation  
DACL1  
7
8
L1ZCEN  
UPDATE  
0
DACL1 Zero Cross Detect Enable  
0: zero cross disabled  
1: zero cross enabled  
Not latched  
Controls simultaneous update of all Attenuation Latches  
0: Store DACL1 in intermediate latch (no change to output)  
1: Store DACL1 and update attenuation on all channels.  
00001  
6:0  
7
R1A[6:0]  
R1ZCEN  
1111111  
(0dB)  
Attenuation Data for Left channel DACL1 in 1dB steps. See Table  
11  
Analogue  
Attenuation  
DACR1  
0
DACR1 Zero Cross Detect Enable  
0: zero cross disabled  
1: zero cross enabled  
8
UPDATE  
Not latched  
Controls simultaneous update of all Attenuation Latches  
0: Store DACR1 in intermediate latch (no change to output)  
1: Store DACR1 and update attenuation on all channels.  
00010  
6:0  
7
L2A[6:0]  
L2ZCEN  
1111111  
(0dB)  
0
Attenuation Data for Left Channel DACL2 in 1dB Steps. See  
Table 11  
Analogue  
Attenuation  
DACL2  
DACL2 Zero Cross Detect Enable  
0: zero cross disabled  
1: zero cross enabled  
8
UPDATE  
Not latched  
Controls simultaneous update of all Attenuation Latches  
0: Store DACL2 in intermediate latch (no change to output)  
1: Store DACL2 and update attenuation on all channels.  
00011  
6:0  
7
R2A[6:0]  
R2ZCEN  
1111111  
(0dB)  
0
Attenuation Data for Right Channel DACR2 in 1dB steps. See  
Table 11  
Analogue  
Attenuation  
DACR2  
DACR2 Zero Cross Detect Enable  
0: zero cross disabled  
1: zero cross enabled  
8
UPDATE  
Not latched  
Controls simultaneous update of all Attenuation Latches  
0: Store DACR2 in intermediate latch (no change to output)  
1: Store DACR2 and update attenuation on all channels.  
00100  
6:0  
7
L3A[6:0]  
L3ZCEN  
1111111  
(0dB)  
0
Attenuation Data for Left channel DACL3 in 1dB steps. See Table  
11  
Analogue  
Attenuation  
DACL3  
DACL2 Zero Cross Detect Enable  
0: zero cross disabled  
1: zero cross enabled  
8
UPDATE  
Not latched  
Controls simultaneous update of all Attenuation Latches  
0: Store DACL3 in intermediate latch (no change to output)  
1: Store DACL3 and update attenuation on all channels.  
Attenuation Data for Left channel DACL3 in 1dB steps. Table 11  
00101  
6:0  
7
R3A[6:0]  
R3ZCEN  
1111111  
(0dB)  
0
Analogue  
Attenuation  
DACR3  
DACR2 Zero Cross Detect Enable  
0: zero cross disabled  
1: zero cross enabled  
8
UPDATE  
Not latched  
Controls simultaneous update of all Attenuation Latches  
0: Store DACR3 in intermediate latch (no change to output)  
1: Store DACR3 and update attenuation on all channels.  
PD Rev 4.1 June 2005  
39  
w
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