Production Data
WM8770
DAC ANALOGUE OUTPUT ATTENUATION
Register bits L1A and R1A control the left and right channel attenuation of DAC 1. Register bits L2A
and R2A control the left and right channel attenuation of DAC 2. Register bits L3A and R3A control
the left and right channel attenuation of DAC 3. Register bits L4A and R4A control the left and right
channel attenuation of DAC 4. Register bits MASTA can be used to control attenuation of all
channels.
Table 8 shows how the attenuation levels are selected from the 7-bit words.
L/RAx[6:0]
00(hex)
:
ATTENUATION LEVEL
-∞dB (mute)
:
-∞dB (mute)
-100dB
:
1A(hex)
1B(hex)
:
7D(hex)
7E(hex)
7F(hex)
-2dB
-1dB
0dB
Table 11 Analogue Volume Control Attenuation Levels
DAC DIGITAL VOLUME CONTROL
The DAC volume may also be adjusted in the digital domain using independent digtal attenuation
control registers
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
01001
7:0
LDA1[7:0]
11111111
(0dB)
Digital Attenuation data for Left channel DACL1 in 0.5dB steps. See
Table 12
Digital
Attenuation
DACL1
8
UPDATE
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store LDA1 in intermediate latch (no change to output)
1: Store LDA1 and update attenuation on all channels
01010
7:0
8
RDA1[6:0]
UPDATE
11111111
(0dB)
Digital Attenuation data for Right channel DACR1 in 0.5dB steps.
See Table 12
Digital
Attenuation
DACR1
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store RDA1 in intermediate latch (no change to output)
1: Store RDA1 and update attenuation on all channels.
01011
7:0
8
LDA2[7:0]
UPDATE
11111111
(0dB)
Digital Attenuation data for Left channel DACL2 in 0.5dB steps. See
Table 12
Digital
Attenuation
DACL2
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store LDA2 in intermediate latch (no change to output)
1: Store LDA2 and update attenuation on all channels.
01100
7:0
8
RDA2[7:0]
UPDATE
11111111
(0dB)
Digital Attenuation data for Right channel DACR2 in 0.5dB steps.
See Table 12
Digital
Attenuation
DACR2
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store RDA2 in intermediate latch (no change to output)
1: Store RDA2 and update attenuation on all channels.
01101
7:0
8
LDA3[7:0]
UPDATE
11111111
(0dB)
Digital Attenuation data for Left channel DACL3 in 0.5dB steps. See
Table 12
Digital
Attenuation
DACL3
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store LDA3 in intermediate latch (no change to output)
1: Store LDA3 and update attenuation on all channels.
01110
7:0
8
RDA3[7:0]
UPDATE
11111111
(0dB)
Digital Attenuation data for Right channel DACR3 in 0.5dB steps.
See Table 12
Digital
Attenuation
DACR3
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store RDA3 in intermediate latch (no change to output)
1: Store RDA3 and update attenuation on all channels.
PD Rev 4.1 June 2005
33
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
