Production Data
WM8770
DAC ANALOGUE VOLUME CONTROL
The DAC volume may be adjusted independently in both the analogue and digital domain using
separate volume control registers.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
00000
6:0
L1A[6:0]
1111111
(0dB)
0
Attenuation data for Left channel DACL1 in 1dB steps. See Table 11
Analogue
Attenuation
DACL1
7
8
L1ZCEN
UPDATE
DACL1 zero cross detect enable
0: zero cross disabled
1: zero cross enabled
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store L1A in intermediate latch (no change to output)
1: Store L1A and update attenuation on all channels.
00001
6:0
7
R1A[6:0]
R1ZCEN
1111111
(0dB)
0
Attenuation data for Right channel DACR1 in 1dB steps. See Table
11
Analogue
Attenuation
DACR1
DACR1 zero cross detect enable
0: zero cross disabled
1: zero cross enabled
8
UPDATE
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store R1A in intermediate latch (no change to output)
1: Store R1A and update attenuation on all channels.
Attenuation data for Left channel DACL2 in 1dB steps. See Table 11
00010
6:0
7
L2A[6:0]
L2ZCEN
1111111
(0dB)
Analogue
Attenuation
DACL2
0
DACL2 zero cross detect enable
0: zero cross disabled
1: zero cross enabled
8
UPDATE
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store L2A in intermediate latch (no change to output)
1: Store L2A and update attenuation on all channels.
00011
6:0
7
R2A[6:0]
R2ZCEN
1111111
(0dB)
Attenuation data for Right channel DACR2 in 1dB steps. See Table
11
Analogue
Attenuation
DACR2
0
DACR2 zero cross detect enable
0: zero cross disabled
1: zero cross enabled
8
UPDATE
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store R2A in intermediate latch (no change to output)
1: Store R2A and update attenuation on all channels.
Attenuation data for Left channel DACL3 in 1dB steps. See Table 11
00100
6:0
7
L3A[6:0]
L3ZCEN
1111111
(0dB)
0
Analogue
Attenuation
DACL3
DACL3 zero cross detect enable
0: zero cross disabled
1: zero cross enabled
8
UPDATE
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store L3A in intermediate latch (no change to output)
1: Store L3A and update attenuation on all channels.
00101
6:0
7
R3A[6:0]
R3ZCEN
1111111
(0dB)
0
Attenuation data for Right channel DACL3 in 1dB steps. See Table
11
Analogue
Attenuation
DACR3
DACR3 zero cross detect enable
0: zero cross disabled
1: zero cross enabled
8
UPDATE
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store R3A in intermediate latch (no change to output)
1: Store R3A and update attenuation on all channels.
PD Rev 4.1 June 2005
31
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
