Production Data
WM8352
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
High Pass Filter enable
REFER TO
R64 (40h)
15
ADC_HPF_ENA
1
ADC Control
0 = disabled
1 = enabled
9:8
ADC_HPF_CUT[1:0]
00
Select cut-off frequency for high-pass filter
00 = 2^-11 (first order) = 3.7Hz @44.1kHz
01 = 2^-5 (2nd order) = ~250Hz @8kHz
10 = 2^-4 (2nd order) = ~250Hz @16kHz
11 = 2^-3 (2nd order) = ~250Hz @32kHz
ADC Left channel polarity:
0 = Normal
1
0
ADCL_DATINV
ADCR_DATINV
0
0
1 = Inverted
ADC Right Channel Polarity
0 = Normal
1 = Inverted
Register 40h ADC Control
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R66 (42h)
ADC Digital
Volume L
15
ADCL_ENA
0
Left ADC enable
0 = disabled
1 = enabled
8
ADC_VU
0
ADC left and ADC right volume do not update until a
1 is written to either ADC_VU register bit.
7:0
ADCL_VOL[7:0] 1100_0000 Left ADC Digital Volume Control
0000 0000 = Digital Mute
0000 0001 = -71.625dB
0000 0010 = -71.25dB
... 0.375dB steps up to
1110 1111 = +17.625dB
Register 42h ADC Digital Volume L
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R67 (43h)
ADC Digital
Volume R
15
ADCR_ENA
0
Right ADC enable
0 = disabled
1 = enabled
8
ADC_VU
0
ADC left and ADC right volume do not update until a
1 is written to either ADC_VU register bit.
7:0
ADCR_VOL[7:0] 1100_0000 Right ADC Digital Volume Control
0000 0000 = Digital Mute
0000 0001 = -71.625dB
0000 0010 = -71.25dB
... 0.375dB steps up to
1110 1111 = +17.625dB
Register 43h ADC Digital Volume R
PD, February 2011, Rev 4.4
249
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
