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WM8216SEFL/R 参数 Datasheet PDF下载

WM8216SEFL/R图片预览
型号: WM8216SEFL/R
PDF下载: 下载PDF文件 查看货源
内容描述: 60MSPS 10位2通道CCD数字转换器 [60MSPS 10-bit 2-channel CCD Digitiser]
分类和应用: 转换器
文件页数/大小: 27 页 / 460 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8216  
Production Data  
REFERENCES  
The ADC reference voltages are derived from an internal band-gap reference, and buffered to pins  
VRT and VRB, where they must be decoupled to ground. Pin VRX is driven by a similar buffer, and  
also requires decoupling. The output buffer from the RLCDAC also requires decoupling at pin  
VRLC/VBIAS.  
The ADC references can be switched from the default values (VRT=2.05V, VRB=1.05V, ADC input  
range=2V) to give a smaller ADC reference range (VRT=1.85V, VRB=1.25V, ADC input range=1.2V)  
under control of the LOWREFS register bit. Setting LOWREFS=1 allows smaller input signals to be  
accommodated.  
Note:  
When LOWREFS = 1 the output of the RLCDAC will scale if RLCDACRNG = 1. The max output  
from RLCDAC will change from 2.05 to 1.85V and the step size will proportionally reduce.  
POWER MANAGEMENT  
Power management for the device is performed via the Control Interface. By default the device is  
fully enabled. The EN bit allows the device to be fully powered down when set low. Individual blocks  
can be powered down using the bits in Setup Register 5. When in MONO mode the unused input  
channels are automatically disabled to reduce power consumption.  
CONTROL INTERFACE  
The internal control registers are programmable via the serial digital control interface. The register  
contents can be read back via the serial interface on pin OP[9]/SDO.  
It is recommended that a software reset is carried out after the power-up sequence, before writing to  
any other register. This ensures that all registers are set to their default values (as shown in Table  
5).  
SERIAL INTERFACE: REGISTER WRITE  
Figure 15 shows register writing in serial mode. Three pins, SCK, SDI and SEN are used. A six-bit  
address (a5, 0, a3, a2, a1, a0) is clocked in through SDI, MSB first, followed by an eight-bit data  
word (b7, b6, b5, b4, b3, b2, b1, b0), also MSB first. Setting address bit a4 to 0 indicates that the  
operation is a register write. Each bit is latched on the rising edge of SCK. When the data has been  
shifted into the device, a pulse is applied to SEN to transfer the data to the appropriate internal  
register.  
SCK  
a5  
0
a3  
a2  
a1  
a0  
b7  
b6  
b5  
b4  
b3  
b2  
b1  
b0  
SDI  
Address  
Data Word  
SEN  
Figure 15 Serial Interface Register Write  
A software reset is carried out by writing to Address “000100” with any value of data, (i.e. Data Word  
= XXXXXXXX).  
PD Rev 4.0 March 2007  
19  
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