WM8216
Production Data
3.5
3
8
Max i/p Voltage
LOWREFS=0
7
6
5
4
3
2
1
Max i/p Voltage
LOWREFS=1
2.5
2
1.5
1
0.5
0
0
0
128
256
384
512
0
128
256
384
512
Gain Code (PGA[8:0])
Gain Code (PGA[8:0])
Figure 11 PGA Gain Characteristic
Figure 12 Peak Input Voltage to Match ADC Full-scale Range
ADC INPUT BLACK LEVEL ADJUST
The output from the PGA can be offset to match the full-scale range of the differential ADC (2*[VRT-
VRB]).
For negative-going input video signals, a black level (zero differential) output from the PGA should be
offset to the top of the ADC range by setting register bits PGAFS[1:0]=10. This will give an output
code of 3FF (hex) from the WM8216 for zero input. If code zero is required for zero differential input
then the INVOP bit should be set.
For positive going input signals the black level should be offset to the bottom of the ADC range by
setting PGAFS[1:0]=11. This will give an output code of 000 (hex) from the WM8216 for zero input.
Bipolar input video is accommodated by setting PGAFS[1:0]=00 or PGAFS[1:0]=01. Zero differential
input voltage gives mid-range ADC output, 1FF (hex).
PD Rev 4.0 March 2007
16
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
