WM8216
Production Data
REGISTER MAP DESCRIPTION
The following table describes the function of each of the control bits shown in Table 5.
REGISTER
BIT
NO
BIT
NAME(S)
DEFAULT
DESCRIPTION
Setup
0
EN
1
Global Enable
Register 1
0 = complete power down,
1 = fully active (individual blocks can be disabled using individual powerdown
bits – see setup register 5).
1
CDS
1
Select correlated double sampling mode:
0 = single ended mode,
1 = CDS mode.
3:2
TWOCHAN /
MONO
10
Sampling mode select
10 = Two channel mode
01 = One channel mode. Input channel selected by CHAN register bit (Reg 3
bit 6), unused channel is powered down.
5:4
PGAFS[1:0]
00
Offsets PGA output to optimise the ADC range for different polarity sensor
output signals. Zero differential PGA input signal gives:
0x = Zero output from the PGA (Output code=511)
10 = Full-scale positive output (OP=1023) - use for negative going video.
NB, Set INVOP=1 if zero differential input should give a zero output
code with negative going video.
11 = Full-scale negative output (OP=0) - use for positive going video
Must be set to 0
7:6
1:0
2
Not Used
Not Used
INVOP
00
00
0
Setup
Register 2
Must be set to 0
Digitally inverts the polarity of output data.
0 = negative going video gives negative going output,
1 = negative-going video gives positive going output data.
3
OPD
0
Output Disable. This works with the OEB pin to control the output pins.
0=Digital outputs enabled, 1=Digital outputs high impedance
OEB (pin)
OPD
OP pins
0
0
1
1
0
1
0
1
Enabled
High Impedance
High Impedance
High impedance
4
LOWREFS
0
Reduces the ADC reference range (2*[VRT-VRB]), thus changing the max/min
input video voltages (ADC ref range/PGA gain).
0= ADC reference range = 2.0V
1= ADC reference range = 1.2V
5
RLCDACRNG
DEL[1:0]
1
Sets the output range of the RLCDAC.
0 = RLCDAC ranges from 0 to AVDD (approximately),
1 = RLCDAC ranges from 0 to VRT (approximately).
7:6
00
Controls the latency from sample to data appearing on output pins
DEL
00
Latency
7 MCLK periods
8 MCLK periods
9 MCLK periods
10 MCLK periods
01
10
11
PD Rev 4.0 March 2007
22
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
