Production Data
WM8195
FME ACYCNRLC
NAME
Internal,
no force mux
DESCRIPTION
0
0
1
0
1
0
Input mux, offset and gain registers determined by
internal register bits INTM1, INTM0.
Auto-cycling,
no force mux
Input mux, offset and gain registers auto-cycled, RINP
→ GINP → BINP → RINP… on RLC/ACYC pulse.
Internal,
Input mux selected from internal register bits FM1, FM0;
force mux
Offset and gain registers selected from internal register
bits INTM1, INTM0.
1
1
Auto-cycling,
force mux
Input mux selected from internal register bits FM1, FM0;
Offset and gain registers auto-cycled, RED → GREEN
→ BLUE → RED… on RLC/ACYC pulse.
Table 4 Colour Selection Description in Line-by-Line Mode
PD Rev 4.1 July 2005
23
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
