Production Data
WM8195
OPERATING MODE TIMING DIAGRAMS
The following diagrams show 14-bit parallel format output and MCLK, VSMP and input video
requirements for operation of the most commonly used modes as shown in Table 5. The diagrams
are identical for both CDS and non-CDS operation. Outputs from RINP, GINP and BINP are shown
as R, G and B respectively. X denotes invalid data.
16.5 MCLK PERIODS
MCLK
VSMP
INPUT VIDEO
R
B
G
R
B
R
B
G
R
B
R
B
G
R
B
R
B
G
R
B
R
B
G
R
B
OP[13:0] (DEL = 00)
OP[13:0] (DEL = 01)
G
G
G
G
G
G
R
B
R
B
G
R
B
R
B
G
R
B
R
B
G
R
B
R
B
G
R
B
R
B
OP[13:0] (DEL = 10)
OP[13:0] (DEL = 11)
G
G
G
G
G
Figure 21 Mode 1 Operation
Figure 22 Mode 2 Operation
Figure 23 Mode 3 Operation
PD Rev 4.1 July 2005
25
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