W90N745CD/W90N745CDG
Continued.
BITS
DESCRIPTION
Page mode access cycle time
tPA[11:8]
MCLK
tPA[11:8]
MCLK
10
12
14
16
18
20
22
24
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
2
3
4
5
6
7
8
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
[11:8]
tPA
Access cycle time
tACC[11:8]
MCLK
tACC[11:8]
MCLK
10
12
14
16
18
20
22
24
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
2
3
4
5
6
7
8
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
[7:4]
tACC
Boot ROM/FLASH data bus width
This ROM/Flash bank is designed for a boot ROM. BASADDR bits
determine its start address. The external data bus width is determined by
the data bus signals D [13:12] power-on setting.
[3:2]
BTSIZE
BTSIZE [3:2]
Bus Width
8-bit
16-bit
RESERVED
RESERVED
D [13:12]
Pull-down Pull-down
Pull-down Pull-up
Pull-up Pull-down RESERVED
Pull-up Pull-up RESERVED
Bus Width
8-bit
0
0
1
1
0
1
0
1
16-bit
Page mode configuration
PGMODE [1:0]
Mode
0
0
1
1
0
1
0
1
Normal ROM
4 word page
8 word page
16 word page
[1:0]
PGMODE
Publication Release Date: September 22, 2006
Revision A2
- 65 -
WINBOND [ WINBOND ]
