W90N745CD/W90N745CDG
Continued.
BITS
DESCRIPTION
Valid time of nWAIT signal
W90N745 recognizes the nWAIT signal at the next “nth” MCLK
rising edge after the nOE or nWBE active cycle. WAITVT bits
determine the n.
WAITVT [2:1]
nth MCLK
[2:1]
WAITVT
0
0
1
1
0
1
0
1
1
2
3
4
Little Endian mode
After power on reset, the content of LITTLE is the Power-On Setting
value from D14 pin. If pin D14 is pull-down, the external memory format
is Big Endian mode. If pin D14 is pull-up, the external memory format is
Little Endian mode. For more detail, refer to Power-On Setting of System
Manager.
[0]
LITTLE
NOTE: This bit is read only.
Publication Release Date: September 22, 2006
- 63 -
Revision A2
WINBOND [ WINBOND ]
