W90N745CD/W90N745CDG
Continued.
BITS
DESCRIPTION
[10:8]
RESERVED
COMPBK
-
Number of component bank in SDRAM bank 0/1
Indicates the number of component bank (2 or 4 banks) in external
SDRAM bank 0/1.
0 = 2 banks
1 = 4 banks
[7]
Data bus width for SDRAM bank 0/1
Indicates the external data bus width connect with SDRAM bank 0/1
If DBWD = 00, the assigned SDRAM access signal is not generated
i.e. disable.
DBWD [6:5]
Bits
[6:5]
DBWD
0
0
1
1
0
1
0
1
Bank disable
8-bit (byte)
16-bit (half-word)
REVERSED
Number of column address bits in SDRAM bank 0/1
Indicates the number of column address bits in external SDRAM
bank 0/1.
COLUMN [4:3]
Bits
[4:3]
COLUMN
0
0
1
1
0
1
0
1
8
9
10
REVERSED
Size of SDRAM bank 0/1
Indicates the memory size of external SDRAM bank 0/1
SIZE [2:0]
Size of SDRAM （Byte）
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Bank disable
2M
[2:0]
SIZE
4M
8M
16M
32M
64M
REVERSED
- 68 -
WINBOND [ WINBOND ]
