W90N745CD/W90N745CDG
Continued.
BITS
DESCRIPTION
I2C1 controller clock enable bit
I2C1
0 = Disable I2C1 controller clock
1 = Enable I2C1 controller clock
I2C0 controller clock enable bit
0 = Disable I2C0 controller clock
1 = Enable I2C0 controller clock
-
[20]
I2C0
RESERVED
PWM
[19]
[18]
[17]
PWM controller clock enable bit
0 = Disable PWM controller clock
1 = Enable PWM controller clock
Audio Controller clock enable bit
0 = Disable AC97 controller clock
1 = Enable AC97 controller clock
USB host/device 48MHz clock source Select bit
0 = USB clock 48MHz input from internal PLL (480MHz/10)
[16]
[15]
AC97
USBCKS
1 = USB clock 48MHz input from external GPIO0 pin, this pin
direction must set to input.
USB device clock enable bit
0 = Disable USB device controller clock
1 = Enable USB device controller clock
GDMA controller clock enable bit
0 = Disable GDMA clock
1 = Enable GDMA clock
-
[14]
[13]
USBD
GDMA
[12]
[11]
RESERVED
RESERVED
-
EMC controller clock enable bit
0 = Disable EMC controller clock
1 = Enable EMC controller clock
-
[10]
[9]
EMC
RESERVED
WDT
WDT clock enable bit
[8]
0 = Disable WDT counting clock
1 = Enable WDT counting clock
Publication Release Date: September 22, 2006
- 47 -
Revision A2