W90N745CD/W90N745CDG
I2C Data Transmit Register 0/1 (I2C_TxR 0/1)
REGISTER
I2C_TXR0
I2C_TXR1
ADDRESS
R/W
DESCRIPTION
RESET VALUE
0x0000_0000
0x0000_0000
0xFFF8_6014 R/W I2C Data Transmit Register
0xFFF8_6114 R/W I2C Data Transmit Register
31
23
15
7
30
22
14
6
29
21
13
5
28
20
12
4
27
19
11
3
26
18
10
2
25
17
9
24
16
8
Tx[31:24]
Tx[23:16]
Tx[15:8]
Tx[7:0]
1
0
BITS
DESCRIPTIONS
Data Transmit Register
The I2C core used 32-bit transmit buffer and provide multi-byte
transmit function. Set CSR[Tx_NUM] to a value that you want to
transmit. I2C core will always issue a transfer from the highest byte
first. For example, if CSR[Tx_NUM] = 0x3, Tx[31:24] will be
transmitted first, then Tx[23:16], and so on.
[31:0]
Tx
In case of a data transfer, all bits will be treated as data.
In case of a slave address transfer, the first 7 bits will be treated as 7-
bit address and the LSB represent the R/W bit. In this case,
LSB = 1, reading from slave
LSB = 0, writing to slave
- 348 -
WINBOND [ WINBOND ]
