W90N745CD/W90N745CDG
6.14.2 I2C Serial Interface Control Registers Map
R: read only, W: write only, R/W: both read and write
NOTE1: The reset value of I2C_WR0/1 is 0x3F only when SCR, SDR and SER are connected to pull
high resistor.
REGISTER
ADDRESS
R/W
DESCRIPTION
I2C Interface 0
0xFFF8_6000 R/W I2C0 Control and Status Register
RESET VALUE
I2C_CSR0
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_003F
0x0000_0000
0x0000_0000
I2C_DIVIDER0 0xFFF8_6004 R/W I2C0 Clock Prescale Register
I2C_CMDR0
I2C_SWR0
I2C_RxR0
I2C_TxR0
0xFFF8_6008 R/W I2C0 Command Register
0xFFF8_600C R/W I2C0 Software Mode Control Register
0xFFF8_6010
R
I2C0 Data Receive Register
0xFFF8_6014 R/W I2C0 Data Transmit Register
I2C Interface 1
I2C_CSR1
0xFFF8_6100 R/W I2C1 Control and Status Register
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_003F
0x0000_0000
0x0000_0000
I2C_DIVIDER1 0xFFF8_6104 R/W I2C1 Clock Prescale Register
I2C_CMDR1
I2C_SWR1
I2C_RxR1
I2C_TxR1
0xFFF8_6108 R/W I2C1 Command Register
0xFFF8_610C R/W I2C1 Software Mode Control Register
0xFFF8_6110
0xFFF8_6114 R/W I2C1 Data Transmit Register
R
I2C1 Data Receive Register
I2C Control and Status Register 0/1 (I2C_CSR0/1)
REGISTER
ADDRESS
R/W
DESCRIPTION
RESET VALUE
0x0000_0000
0x0000_0000
I2C_CSR0 0xFFF8_6000 R/W I2C Control and Status Register 0
I2C_CSR1 0xFFF8_6100 R/W I2C Control and Status Register 1
31
23
15
7
30
22
14
29
21
13
5
28
20
12
4
27
Reserved
19
Reserved
11
26
18
10
25
17
9
24
16
8
Reserved
I2C_RxACK I2C_BUSY
I2C_AL
1
I2C_TIP
0
6
3
2
Reserved
Tx_NUM
Reserved
IF
IE
I2C_EN
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