W90N745CD/W90N745CDG
Continued
BITS
DESCRIPTIONS
I²S serial data clock frequency selection bit
BCLK_SEL[1:0]=00, 32fs is selected (fs is sampling rate), when
FS_SEL=0, the frequency of bit clock is MCLK/8, when
FS_SEL=1, the frequency of bit clock is MCLK/12.
BCLK_SEL
[1:0]
[7:6]
BCLK_SEL[1:0]=01, 48fs is selected (only when FS_SEL=1, this
term could be selection), when FS_SEL=1, the frequency of bit
clock is MCLK/8.
The BCLK_SEL[1:0] bits are read/write
I²S sampling frequency selection bit
FS_SEL=0, FMCLK/256 is selected (FMCLK is the frequency of
signal MCLK)
[5]
[4]
FS_SEL
FS_SEL=1, FMCLK/384 is selected
The FS_SEL bit is read/write
I²S MCLK output selection bit
MCLK_SEL=0, I²S MCLK output will follow the PRS[3:0] setting.
MCLK_SEL=1, I²S MCLK output will be the same with FPLL.
The MCLK_SEL bit is read/write
MCLK_SEL
I²S format selection bits
FORMAT=0, I²S compatible format is selected
FORMAT=1, MSB-justified format is selected
The FORMAT bit is read/write
[3]
FORMAT
Reserved
[2:0]
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AC-link Control Register (ACTL_ACCON)
REGISTER
ADDRESS
R/W
DESCRIPTION
AC-link control register
RESET VALUE
0xFFF0_902C R/W
0x0000_0000
ACTL_ACCON
The ACTL_ACCON register is the AC-link basic operation control register.
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