W90N745CD/W90N745CDG
31
23
15
7
30
22
14
6
29
21
13
5
28
AUDIO_PDSTB[31:24]
20 19
AUDIO_PDSTB[23:16]
12 11
AUDIO_PDSTB[15:8]
27
26
18
10
2
25
17
9
24
16
8
4
3
1
0
AUDIO_PDSTB[7:0]
BITS
DESCRIPTIONS
32-bit play destination base address
[31:0]
AUDIO_PDSTB[31:0]
The AUDIO_PDSTB[31:0] bits is read/write.
DMA destination end address (ACTL_PDST_LENGTH)
REGISTER
ADDRESS R/W
DESCRIPTION
RESET VALUE
0xFFF0_901C R/W DMA play destination address length 0x0000_0000
ACTL_PDST_LENGTH
The value in ACTL_PDST_LENGTH register is the play destination address length of DMA, and the
register could only be changed by CPU.
31
23
15
7
30
22
14
6
29
21
13
5
28
AUDIO_PDST_L[31:24]
20 19
AUDIO_PDST_L[23:16]
12 11
AUDIO_PDST_L[15:8]
27
26
18
10
2
25
17
9
24
16
8
4
3
1
0
AUDIO_PDST_L[7:0]
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