W90N745CD/W90N745CDG
31
23
15
7
30
22
14
6
29
21
13
5
28
20
12
4
27
19
11
3
26
18
10
2
25
17
9
24
16
8
Reserved
Reserved
Reserved
1
0
AC_BCLK_PU_EN AC_R_FINISH AC_W_FINISH
AC_W_RES AC_C_RES
Reserved
Reserved
BITS
DESCRIPTIONS
[6]
Reserved
-
This bit controls the AC_BCLK pin pull-high resister.
AC_BCLK_PU_EN=0, the AC_BCLK pin pull-high resister will be
disabled
[5]
[4]
AC_BCLK_PU_EN
AC_R_FINISH
AC_BCLK_PU_EN=1, the AC_BCLK pin pull-high resister will be
enabled
The AC_BCLK_PU_EN bit is read/write.
AC-link read data ready bit. When read data indexed by previous
frame is shifted into ACTL_ACIS2, the AC_R_FINISH bit will be
set to 1 automatically. After CPU read out the read data,
AC_R_FINISH bit will be cleared to 0.
AC_R_FINISH=0, read data buffer has been read by CPU
AC_R_FINISH=1, read data buffer is ready for CPU read
The AC_R_FINISH bit is read only
AC-link write frame finish bit. When writing data to register
ACTL_ACOS0, the AC_W_FINISH bit will be set to 1
automatically. After AC-link interface shift out the register
ACTL_ACOS0, the AC_W_FINISH bit will be cleared to 0.
AC_W_FINISH=0, AC-link control data out buffer has been shifted
out to codec by CPU and data out buffer is empty.
AC_W_FINISH=1, AC-link control data out buffer is ready to be
shifted out(After users have wrote data into register
ACTL_ACOS0)
[3]
AC_W_FINISH
The AC_W_FINISH bit is read only
Publication Release Date: September 22, 2006
- 247 -
Revision A2
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