W90N745CD/W90N745CDG
BITS
DESCRIPTIONS
32-bit record destination address length
The AUDIO_RDST_L[31:0] bits is read/write.
[31:0]
AUDIO_RDST_L[31:0]
DMA destination current address (ACTL_RDSTC)
REGISTER
ADDRESS
R/W
DESCRIPTION
RESET VALUE
0xFFF0_9010 RO
DMA record destination current address 0x0000_0000
ACTL_RDSTC
The value in ACTL_RDSTC is the DMA record destination current address, this register could only be
read by CPU.
31
23
15
7
30
22
14
6
29
21
13
5
28
AUDIO_RDSTC[31:24]
20 19
AUDIO_RDSTC[23:16]
12 11
AUDIO_RDSTC[15:8]
27
26
18
10
2
25
17
9
24
16
8
4
3
1
0
AUDIO_RDSTC[7:0]
BITS
DESCRIPTIONS
32-bit record destination current address
[31:0]
AUDIO_RDSTC[31:0]
The AUDIO_RDSTC[31:0] bits is read only.
Audio controller record status register (ACTL_RSR)
REGISTER
ADDRESS
R/W
DESCRIPTION
RESET VALUE
Audio controller FIFO and DMA status
register for record
ACTL_RSR
0xFFF0_9014 R/W
0x0000_0000
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