W83115RG-BW/W83115WG-BW
STEPLESS FOR INTEL BROADWATER CLOCK GENERATOR
7.12 Register 11: ( Default : 7Ah )
AFFECTED PIN/
BIT
PWD
FUNCTION DESCRIPTION
TYPE
FUNCTION NAME(S)
7
6
5
4
3
2
1
0
NVAL<7>
NVAL<6>
NVAL<5>
NVAL<4>
NVAL<3>
NVAL<2>
NVAL<1>
NVAL<0>
0
1
1
1
1
0
1
0
Programmable N divisor for CPU frequency. The bit
8,9,10 is defined in Register 10.
R/W
Default value follow FS=2 (011_0111_1010 =894-4)
7.13 Register 12: ( Default : 7Ah )
AFFECTED PIN/
BIT
PWD
FUNCTION DESCRIPTION
TYPE
FUNCTION NAME(S)
7
6
5
4
3
2
1
0
N3VAL<7>
N3VAL<6>
N3VAL<5>
N3VAL<4>
N3VAL<3>
N3VAL<2>
N3VAL<1>
N3VAL<0>
0
1
1
1
1
0
1
0
Programmable N divisor for SRC frequency.
SRC programmable range is 115M ~ 86M.
R/W
7.14 Register 13: ( Default : 10h )
AFFECTED PIN/
BIT
PWD
FUNCTION DESCRIPTION
TYPE
FUNCTION NAME(S)
SSEL<4>
7
6
5
4
3
0
0
0
1
0
SSEL<3>
SSEL<2>
SSEL<1>
SSEL<0>
Software frequency table selection through I2C
R/W
Enable software table selection FS[4:0].
0 = Hardware table setting (Jump mode).
1 = Software table setting through Bit7~3 .
(Jumpless mode)
2
EN_SSEL
0
R/W
1
0
Reserved
ITP_EN
0
0
R/W
R/W
Select SRC8 or CPU2_ITP clock
0: to select the SRC8 clock
1: to select the CPU2_ITP clock
- 16 -