W83115RG-BW/W83115WG-BW
STEPLESS FOR INTEL BROADWATER CLOCK GENERATOR
7.20 Register 19: ( Default : 30h )
AFFECTED PIN/
BIT
PWD
FUNCTION DESCRIPTION
TYPE
FUNCTION NAME(S)
Invert the PCICLK phase
0: Default
1: Inverse
7
INV_PCI
0
R/W
Invert the USB48M phase
0: Default
1: Inverse
6
INV_USB48
0
R/W
5
4
3
2
1
0
SPCNT3<5>
SPCNT3<4>
SPCNT3<3>
SPCNT3<2>
SPCNT3<1>
SPCNT3<0>
1
1
0
0
0
0
Spread Spectrum Programmable time, the
resolution is 280ns. Default period is 11.8us
R/W
TABLE 2 : PIN17,18 (SRCT1/SE1, SRCC1/SE2) FREQ CONFIGURATION BASED ON PCIELOOP
PIN17
PIN18
CLOCK
R1B4 R1B3 R1B2 R1B1
SPREAD (%)
COMMENT
(MHZ)
(MHZ)
TYPE
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
100
100
100
100
100
100
100
-
24.576
24.576
98.304
27
100
100
100
100
100
100
100
-
24.576
98.304
98.304
27
-
Differential PCIELOOP disable
0.5% down Differential SRC1 follow SRCs
0.5% down Differential SRC1 come from PCIELOOP
1% down Differential SRC1 come from PCIELOOP
1.5% down Differential SRC1 come from PCIELOOP
2% down Differential SRC1 come from PCIELOOP
2.5% down Differential SRC1 come from PCIELOOP
-
-
-
-
-
-
-
-
-
-
-
Non
Non
Non
Non
Non
-
Single End
Single End
Single End
Single End
25
-
-
-
25
-
-
-
Single End
-
-
-
-
-
Publication Release Date: December, 2006
Revision 1.0
- 19 -
WINBOND [ WINBOND ]
