W3H64M72E-XSBX
White Electronic Designs
ADVANCED*
AC TIMING PARAMETERS (continued)
-55°C ≤ TA < +125°C; VCCQ = + 1.8V 0.1V, VCC = +1.8V 0.1V
533Mbs CL4
Symbol
400Mbs CL3
Unit
Parameter
Address and control input pulse width for each input
Min
0.6
Max
Min
Max
tIPW
tISa
0.6
tCK
ps
ps
ps
ps
ps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tCK
ns
ns
µs
µs
ns
tCK
ps
tCK
ps
tCK
ps
500
250
500
375
2
600
350
600
475
Address and control input setup time
Address and control input hold time
tISb
tIHa
tIHb
CAS# to CAS# command delay
ACTIVE to ACTIVE (same bank) command
ACTIVE bank a to ACTIVE bank b command
ACTIVE to READ or WRITE delay
Four Bank Activate period
ACTIVE to PRECHARGE command
Internal READ to precharge command delay
Write recovery time
Auto precharge write recovery + precharge time
Internal WRITE to READ command delay
PRECHARGE command period
PRECHARGE ALL command period
LOAD MODE command cycle time
CKE low to CK, CK# uncertainty
REFRESH to Active or Refresh to Refresh command interval
Average periodic refresh interval (commercial)
Average periodic refresh interval (industrial)
Exit self refresh to non-READ command
Exit self refresh to READ
tCCD
tRC
2
55
55
10
15
tRRD
tRCD
tFAW
tRAS
tRTP
tWR
10
15
50
40
7.5
15
tWR + tRP
7.5
15
50
40
70,000
70,000
7.5
15
tWR + tRP
10
15
tDAL
tWTR
tRP
tRPA
tMRD
tDELAY
tRFC
tREFI
tREFIIT
tXSNR
tXSRD
tlSXR
tAOND
tACN
tAOFD
tRP + tCK
2
tIS +tIH + tCK
127.5
tRP + tCK
2
tIS +tIH + tCK
127.5
70,000
7.8
3.9
70,000
7.8
3.9
tRPC(MIN) + 10
tRFC(MIN) + 10
200
tIS
2
tAC(MIN)
2.5
tAC(MIN)
200
tIS
Exit self refresh timing reference
ODT tum-on delay
ODT turn-on
ODT turn-off delay
ODT tum-off
2
2
2
tAC(MAX) + 1000
2.5
tAC(MAX) + 600
tAC(MIN)
2.5
tAC(MAX) + 1000
2.5
t
tAC(MIN)
tAC(MAX) + 600
AOF
tAC(MIN)
+
2 x tCK
tAC(MAX) + 1000
2 x tCK
tAC(MAX) + 1000
+
tAC(MIN)
+
2 x tCK
tAC(MAX) + 1000
2 x tCK
tAC(MAX) + 1000
+
ODT tum-on (power-down mode)
ODT turn-off (power-down mode)
tAONPD
ps
ps
2000
2000
tAC(MIN)
2000
+
+
tAC(MIN)
2000
+
+
tAOFPD
ODT to power-down entry latency
ODT power-down exit latency
ODT enable from MRS command
Exit active power-down to READ command, MR[bit12=0]
Exit active power-down to READ command, MR[bit12=1]
Exit precharge power-down to any non-READ command
CKE minimum high/low time
tANPD
tAXPD
tMOD
tXARD
tXARDS
tXP
3
8
12
2
6-AL
2
3
3
8
12
2
6-AL
2
3
tCK
tCK
ns
tCK
tCK
tCK
tCK
tCKE
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
March 2006
Rev. 1
27
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
