128Mb Synchronous DRAM
P2V28S20ATP-7,-75,-8 (4-BANK x 8,388,608-WORD x 4-BIT)
P2V28S30ATP-7,-75,-8 (4-BANK x 4,194,304-WORD x 8-BIT)
P2V28S40ATP-7,-75,-8 (4-BANK x 2,097,152-WORD x 16-BIT)
DQM CONTROL
DQM is a dual function signal defined as the data mask for
writesandtheoutputdisableforreads. Duringwrites, DQM(U,L)
masksinputdatawordbyword. DQM(U,L)towritemasklatency
is0. Duringreads, DQM(U,L)forcesoutputtoHi-Zwordbyword.
DQM(U,L) to output Hi-Z latency is 2.
DQM Function(CL=3)
CLK
Command
DQM
Write
READ
D0
D2
D3
Q0
Q1
Q3
DQ
disabled by DQM(U,L)=H
masked by DQM(U,L)=H
JULY.2000
Rev.2.2
Page-30