128Mb Synchronous DRAM
P2V28S20ATP-7,-75,-8 (4-BANK x 8,388,608-WORD x 4-BIT)
P2V28S30ATP-7,-75,-8 (4-BANK x 4,194,304-WORD x 8-BIT)
P2V28S40ATP-7,-75,-8 (4-BANK x 2,097,152-WORD x 16-BIT)
SELF REFRESH
synchronous inputs is saved. To exit the self-refresh, supplying
stableCLKinputs, assertingDESELorNOPcommandandthen
asserting CKE=H. After tRC from the 1st CLK egde following
CKE=H,allbanksareintheidlestateandanewcommandcanbe
issued,butDESELorNOPcommandsmustbeassertedtillthen.
Self-refresh mode is entered by issuing a REFS command
(/CS= /RAS= /CAS= L, /WE= H, CKE= L). Once the self-
refresh is initiated, it is maintained as long as CKE is kept
low. During the self-refresh mode, CKE is asynchronous and
the only enabled input ,all other inputs including CLK are
disabled and ignored, so that power consumption due to
Self-Refresh
CLK
/CS
Stable CLK
NOP
/RAS
/CAS
/WE
CKE
A0-11
BA0,1
new command
X
00
minimum tRFC
for recovery
Self Refresh Exit
Self Refresh Entry
JULY.2000
Rev.2.2
Page-28
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
