128Mb Synchronous DRAM
P2V28S20ATP-7,-75,-8 (4-BANK x 8,388,608-WORD x 4-BIT)
P2V28S30ATP-7,-75,-8 (4-BANK x 4,194,304-WORD x 8-BIT)
P2V28S40ATP-7,-75,-8 (4-BANK x 2,097,152-WORD x 16-BIT)
CLK SUSPEND
CKE controls the internal CLK at the following cycle. Figure
below shows how CKE works. By negating CKE, the next
internal CLK is suspended.The purpose of CLK suspend is
power down, output suspend or input suspend. CKE is a
synchronous input except during the self-refresh mode. CLK
suspend can be performed either when the banks are active
or idle. A command at the suspended cycle is ignored.
ext.CLK
tIH tIS
tIH tIS
CKE
int.CLK
Power Down by CKE
CLK
CKE
Standby Power Down
Active Power Down
Command
PRE NOP NOP NOP
CKE
Command
ACT NOP NOP NOP
DQ Suspend by CKE (CL=2)
CLK
CKE
Command
Write
D0
Read
D1
D2
D3
DQ
Q0
Q1
Q2
Q3
JULY.2000
Rev.2.2
Page-29
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
