G56047-0, Rev 1.1
STS-192/STM-64 SONET/SDH Transceiver
VSC9116
Table 1.2. Hardware Signal Definitions (8 of 8) (Cont.)
Pin Label
TTOHCLKOUT
Buffer Type Signal Name
Description
Transmit Side
Transport
TTL-O-TS-50 Clock reference for the transmit transport overhead port outgoing
signals (TTOHREN, TTOHFP). The clock is a 77.76 MHz signal.
Overhead Port
Clock Out
TTOHFP
Transmit Side
Transport
Overhead Port
Frame Pulse
TTL-O-TS-65 Frame reference for the transmit transport overhead port. TTOHFP is a
one clock cycle wide pulse indicating the start of a new data stream on
TTOH[7..0], i.e. first row of the Section overhead. The response latency
from TTOHFP is asserted until the first byte on TTOH[7..0] is ready
must not exceed 20 TTOHCLKOUT cycles. TTOHFP changes on the
programmable edge of TTOHCLKOUT.
TTOHREN
Transmit Side
Transport
Overhead Port
Read Enable
TTL-O-TS-65 Read enable signal for the TTOH[7..0] data stream. The response
latency from TTOHREN is asserted on the output pin until TTOHWEN
(i.e. TTOH[7..0] as well) is ready must not exceed 20 TTOHCLKOUT
cycles. TTOHREN changes on the programmable edge of
TTOHCLKOUT. The active level of TTOHREN is programmable.
Between each row of overhead TTOHREN will be de-asserted.
TTOHCLKIN
TTOHWEN
Transmit Side
Transport
Overhead Port
Clock In
Transmit Side
Transport
Overhead Port
Write Enable
TTL-I
TTL-I
Incoming clock reference for the transmit transport overhead port
incoming signals (TTOH[7..0], TTOHWEN, TTOHEN). The clock is a
77.76 MHz signal and must be frequency locked to the outgoing TTOH
reference clock (TTOHCLKOUT).
Incoming write enable signal for the TTOH[7..0] data stream.
TTOHWEN must follow the TTOHREN with a latency not exceeding 20
TTOHCLKOUT cycles. TTOHWEN is sampled on the programmable
edge of the co-directional input clock TTOHCLKIN. The active level of
TTOHWEN is programmable.
TTOHEN
Transmit Side
Transport
Overhead Port
Enable
TTL-I
TTL-I
Enable signal for the TTOH[7..0] data stream. If TTOHEN is asserted
(high), the corresponding byte will be inserted in the corresponding
transport overhead byte of the outgoing STS-192/STM-64. TTOHEN is
sampled on the programmable edge of the co-directional input clock
TTOHCLKIN.
Data input for the transmit transport overhead (section/regenerator and
line/multiplex) bytes to be inserted in the outgoing STS-192/STM-64
signal. TTOH[7..0] is sampled on the programmable edge of the co-
directional input clock TTOHCLKIN.
TTOH [7..0]
Transmit Side
Transport
Overhead Port
Data
TSPCLK [1..2]
TSPFP [1..2]
Transmit Side
Special Purpose
Port Clock
Transmit Side
Special Purpose
Port Frame Pulse
TTL-O-TS-65 Clock reference for transmit special purpose input port. The clock is a
2.16 MHz, 50% duty-cycle signal (optionally gapped to match the
bandwidth of TSPDAT).
TTL-O-TS-65 This signal is a one clock cycle wide pulse indicating the start of a new
data stream on TSPDAT. When TSPFP is asserted, the first bit of
TSPDAT is sampled on TSPCLK between 1 and 4.5 clock cycles later,
depending on the programming of clocking edge and latency.
TSPREN [1..2]
TSPDAT [1..2]
Transmit Side
Special Purpose
Port Read Enable
Transmit Side
Special Purpose
Port Data
TTL-O-TS-65 Read enable signal for the TSPDAT data stream. The response latency
from TSPREN is asserted until TSPDAT is sampled is programmable.
TSPREN changes on programmable edge of TSPCLK.
TTL-I
Data input for special purpose port. TSPDAT is sampled on
programmable edge of TSPCLK. Data shifted in during the current
frame will be transmitted in the following frame.
Page 34
1.0 Product Description
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
