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VSC8025TQ 参数 Datasheet PDF下载

VSC8025TQ图片预览
型号: VSC8025TQ
PDF下载: 下载PDF文件 查看货源
内容描述: [Mux/Demux, 1-Func, PBGA192, TBGA-192]
分类和应用: ATM异步传输模式电信电信集成电路
文件页数/大小: 42 页 / 673 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
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VITESSE  
SEMICONDUCTOR CORPORATION  
Datasheet  
2.488 Gb/s ATM/SDH/SONET STM-16/STS-48  
VSC8025/VSC8026  
Mux/Demux and Section Terminator IC Chipset  
Table 9: Pin Identification Table  
Signal  
Pin  
I/O  
Level  
Pin Description  
N/C  
VCC  
C04  
C05  
C06  
C07  
C08  
C09  
C10  
C11  
C12  
C13  
C14  
C15  
C16  
D01  
D02  
D03  
D04  
D05  
D06  
D07  
D08  
D09  
D10  
D11  
D12  
D13  
D14  
D15  
D16  
E01  
E02  
E03  
E04  
E13  
E14  
E15  
E16  
F01  
No Connection (tie to 0V or leave open)  
PWR  
PWR  
PWR  
PWR  
PWR  
PWR  
PWR  
PWR  
I
GND  
-2V  
Ground  
VTT  
-2.0V power supply  
+3.3V power supply  
-2.0V power supply  
-2.0V power supply  
+3.3 V power supply  
-2.0V power supply  
Ground  
VTTL  
VTT  
+3.3V  
-2V  
VTT  
-2V  
VTTL  
VTT  
+3.3V  
-2V  
VCC  
GND  
TTL  
TTL  
TTL  
GND  
TTL  
TXIND3  
TXIND1  
TXINC6  
VCC  
Parallel input bus data D  
Parallel input bus data D  
Parallel input bus data C  
Ground  
I
I
PWR  
I
DISB1GEN  
N/C  
Disable B1 generation (active high)  
No Connection (tie to 0V or leave open)  
Ground  
VGND  
N/C  
PWR  
GND  
No Connection (tie to 0V or leave open)  
No Connection (tie to 0V or leave open)  
Ground  
N/C  
VCC  
PWR  
PWR  
PWR  
PWR  
PWR  
PWR  
I
GND  
GND  
GND  
GND  
GND  
GND  
TTL  
VCC  
Ground  
VCC  
Ground  
VCC  
Ground  
VCC  
Ground  
VCC  
Ground  
TXIND2  
TXIND0  
VCC  
Parallel input bus data D  
Parallel input bus data D  
Ground  
I
TTL  
PWR  
I
GND  
TTL  
TXINC4  
TXINC3  
TXPCLKIN-  
N/C  
Parallel input bus data C  
Parallel input bus data C  
Transmit parallel clock in  
No Connection (tie to 0V or leave open)  
Ground  
I
TTL  
I
ECL  
VCC  
PWR  
PWR  
PWR  
PWR  
I
GND  
+3.3V  
+3.3V  
GND  
TTL  
VTTL  
VTTL  
VCC  
+3.3V power supply  
+3.3V power supply  
Ground  
TXINC1  
TXFPINC  
N/C  
Parallel input bus data C  
Transmit frame pulse in (active high)  
No Connection (tie to 0V or leave open)  
I
TTL  
Page 14  
VITESSE SEMICONDUCTOR CORPORATION  
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896  
G52182-0, Rev. 4.0  
1/5/00  
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