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VSC7111XJW 参数 Datasheet PDF下载

VSC7111XJW图片预览
型号: VSC7111XJW
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom IC, PQCC32,]
分类和应用:
文件页数/大小: 55 页 / 894 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
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Advance Product Information  
Subject to Change  
VSC7111 Datasheet  
Registers  
3.4.6  
Global Output PE 1  
This register configures the pre-emphasis amp 1 (PE 1) value and decay time constant  
for all outputs.  
Table 31.  
Register 56’h: Global Output PE 1  
Bit Name  
Access Description  
Default  
00  
7:6 Unused  
5:3 GPE1LEVEL  
R
Unused  
R/W  
Global PE 1 level  
111: Maximum PE  
000  
001: Minimum PE  
000: PE Off  
2:0 GPE1DECAY  
R/W  
Global PE 1 decay time constant  
111: Slowest decay  
000  
000: Fastest decay  
3.4.7  
Global Output PE 2  
This register configures the pre-emphasis amp 2 (PE 2) value and decay time constant  
for all outputs.  
Table 32.  
Register 57’h: Global Output PE 2  
Bit Name  
Access Description  
Default  
00  
7:6 Unused  
5:3 GPE2LEVEL  
R
Unused  
R/W  
Global PE 2 level  
111: Maximum PE  
000  
001: Minimum PE  
000: PE Off  
2:0 GPE2DECAY  
R/W  
Global PE 2 decay time constant  
111: Slowest decay  
000  
000: Fastest decay  
3.4.8  
Global Output Level  
This register sets the output power level (peak-to-peak differential voltage) for all  
outputs.  
Table 33.  
Register 58’h: Global Output Level  
Bit Name  
GODPWR_OVRD  
Access Description  
R/W Allow GODHIGHPOWER to control output driver  
Default  
7
0
power/bandwidth  
1: GODHIGHPOWER register controls the output  
driver bandwidth/power  
0: LOWPWR pin controls the output driver  
bandwidth/power  
Revision 2.0  
September 2010  
Confidential  
Page 37  
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