Advance Product Information
Subject to Change
VSC7111 Datasheet
Registers
Table 22.
Page 22’h: Output Level (continued)
Bit Name
Access Description
R/W Channel output drive level
Default
3:0 CODRV
1001
1111: 1600 mV (maximum)
1110: 1450 mV
1101: 1300 mV
1100: 1130 mV
1011: 1000 mV
1010: 900 mV
1001: 800 mV
1000: 740 mV
0111: 680 mV
0110: 630 mV
0101: 580 mV
0100: 540 mV
0011: 500 mV
0010: 450 mV (minimum)
0001: Vitesse use only (unspecified output swing)
0000: Vitesse use only (unspecified output swing)
3.3.14
Output Mode
This register controls OOB signaling and output modes for the selected output.
Table 23.
Page 23’h: Output Mode
Bit Name
Access Description
Default
7
CRXDETEN
R/W
Enable Rx detect
0
1: Enable Rx detect
0: Disable Rx detect
6
5
Reserved
R/W
R/W
Reserved. Vitesse use only.
0
0
CSLEWLIM
Limit slew rate
1: Limit slew rate to 100 ps
0: Normal slew rate
4
3
2
1
0
CJAM
R/W
R/W
R/W
R/W
R/W
Enable forced output
1: Output is forced to jam value
0: Output normal
0
0
0
0
1
CJAMVAL
CDRVCM
COOBEN
Forced output value
1: Output value is 1
0: Output value is 0
Channel drive common-mode
1: Output suppressed (0 differential drive)
0: Output normal
Channel OOB forwarding enable
1: Enable OOB (0 differential when LOS detected)
0: Disable OOB forwarding
CODPOWEROFF
Output power off
1: Output driver off
0: Output driver on
Revision 2.0
September 2010
Confidential
Page 33
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
