Advance Product Information
Subject to Change
VSC7111 Datasheet
Registers
Table 34.
Register 59’h: Global Output Mode (continued)
Bit Name
GODPOWEROFF
Access Description
R/W Global output power off
Default
0
1
1: Output driver off
0: Output driver on
3.4.10
Global Input ISE 1 Long
This register configures the input signal equalization (ISE) stage 1 long time constant.
Table 35.
Register 5A’h: Global Input ISE 1 Long
Bit Name
Access Description
Default
000
7:5 Unused
4:0 GISE1LONG
R
Unused
R/W
ISE 1 long time constant
11111: Maximum
…
00000
00000: Minimum
3.4.11
Global Input ISE 1 Short
This register configures the input signal equalization (ISE) stage 1 short time constant.
Table 36.
Register 5B’h: Global Input ISE 1 Short
Bit Name
Access Description
Default
000
7:5 Unused
R
Unused
4:0 GISE1SHORT
R/W
ISE 1 short time constant
11111: Maximum
…
00000
00000: Minimum
3.4.12
Global Input ISE 2 Long
This register configures the input signal equalization (ISE) stage 2 long time constant.
Table 37.
Register 5C’h: Global Input ISE 2 Long
Bit Name
Access Description
Default
000
7:5 Unused
4:0 GISE2LONG
R
Unused
R/W
ISE 2 long time constant
11111: Maximum
…
00000
00000: Minimum
Revision 2.0
September 2010
Confidential
Page 39
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
