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Subject to Change
VSC7111 Datasheet
Registers
3.4.13
Global Input ISE 2 Short
This register configures the input signal equalization (ISE) stage 2 short time constant.
Table 38.
Register 5D’h: Global Input ISE 2 Short
Bit Name
Access Description
Default
000
7:5 Unused
4:0 GISE1LONG
R
Unused
R/W
ISE 2 short time constant
11111: Maximum
…
00000
00000: Minimum
3.4.14
Global PCIe Control
This register configures the PCIe receiver detect state machine.
Table 39.
Register 5E’h: Global PCIe Control
Bit Name
Access Description
Default
0000
0
7:4 Unused
R
Unused
3
GLOS_DELAY
R/W
PCIe LOS filter delay
0: Long LOS filter delay
1: Short LOS filter delay
2:1 GRXDET_THRES
R/W
R/W
RX Detect threshold
11: Lowest threshold
…
01
0
00: Highest threshold
0
GPCIE_MODE
Enable PCIe state machine
1: PCIe state machine enabled when not in
static mode.
0: PCIe state machine disabled when not in
static mode.
3.4.15
Global Input AEQ Control
This register controls the receive AEQ block.
Register 60’h: Input AEQ Control
Table 40.
Bit Name
Access Description
Default
7
GAEQENA
R/W
Input AEQ enable
1
1: Use adaptive EQ when EQMAN pin = 0;
use manual EQ when EQMAN pin = 1
0: Use adaptive EQ when EQMAN pin = 1;
use manual EQ when EQMAN pin = 0
6
GAEQATTENENA
R/W
Input attenuator control
1
1: Input attenuator adaptation is on
0: Input attenuator adaptation is off
Revision 2.0
September 2010
Confidential
Page 40
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
