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VSC6134XST-01 参数 Datasheet PDF下载

VSC6134XST-01图片预览
型号: VSC6134XST-01
PDF下载: 下载PDF文件 查看货源
内容描述: [Micro Peripheral IC,]
分类和应用:
文件页数/大小: 438 页 / 4019 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
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VSC6134  
Datasheet  
3.6.37  
Add/Drop TCM1 TTI Generator FIFO Access Register  
This register provides access to a 32-word deep, 16-bit wide FIFO that holds the TTI values to be  
inserted into the TCM1 field if provisioned. The FIFO has one configurable pointer for both read and  
write operations shown in Table 184. Each time a read or write operation occurs at this address (0x857  
Add or 0x2D7 Drop), the pointer is automatically incremented by 1. The value of n is in the range from  
0 to 63 and each of the 32 registers in the FIFO contains two 8-bit values for TTI. The values that reside  
in the FIFO’s 64 eight-bit fields are the value that are inserted into the outgoing TTI field on a rotating  
basis. The 64-byte TTI signal is aligned with the OTU MFAS. Byte 0 of the 64-byte TTI signal is  
present at OTU multiframe positions 00, 40, 80, and C0 (hex).  
Address:  
0x857: Add Path  
0x2D7: Drop Path  
0x0000  
Register Reset Value:  
Table 190. Add/Drop TCM1 TTI Generator FIFO Access Register  
Reset  
Value  
Bit  
Name  
Access  
Description  
15:8  
[ADD/DROP]_TCM1_TTI n  
(n is odd)  
R/W  
The value at bits [15:8] of address 11111 of the FIFO  
represents TTI 63.  
0x00  
7:0  
[ADD/DROP]_TCM1_TTI n  
(n is even)  
R/W  
The value of bits [7:0] of address 00000 of the FIFO  
represents TTI 0.  
0x00  
274 of 438  
VMDS-10185 Revision 4.0  
July 2006