VSC6134
Datasheet
3.6.29
Add/Drop FEC Encoder Interrupt Bits Register
Address:
0x833: Add Path
0x2B3: Drop Path
0x0000
Register Reset Value:
Table 182. Add/Drop FEC Encoder Interrupt Bits Register
Reset
Value
Bit
Name
Access
Description
15
[ADD/DROP]_GCCG_RDY
RO
Interrupt to microprocessor indicating it has 1 to 3 ms to
update GCCG FIFO with GCC data.
0
14
[ADD/DROP]_FIFO_SPILL
Reserved
RO
RO
Interrupt to microprocessor indicating that a FIFO
underflow or overflow has occured.
0
13:0
0x0000
3.6.30
Add/Drop TCM TTI Generator FIFO Pointer Values Register 1
Address:
0x850: Add Path
0x2D0: Drop Path
0x0000
Register Reset Value:
Table 183. Add/Drop TCM TTI Generator FIFO Pointer Values Register 1
Reset
Value
Bit
Name
Access
Description
15:11
[ADD/DROP]_TCM6_TTI_PNT
R/W
This field is a pointer to the FIFO in Table 185 that holds the
TCM6 TTI values. This pointer is used for both read and
write operations and is automatically incremented by 1 after
any read or write operation.
00000
00000
00000
0
10:6
5:1
0
[ADD/DROP]_TCM5_TTI_PNT
[ADD/DROP]_TCM4_TTI_PNT
Reserved
R/W
R/W
RO
This field is a pointer to the FIFO in Table 186 that holds the
TCM5 TTI values. This pointer is used for both read and
write operations and is automatically incremented by 1 after
any read or write operation.
This field is a pointer to the FIFO in Table 187 that holds the
TCM4 TTI values. This pointer is used for both read and
write operations and is automatically incremented by 1 after
any read or write operation.
270 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
