VSC6134
Datasheet
3.6.31
Add/Drop TCM TTI Generator FIFO Pointer Values Register 2
Address:
0x851: Add Path
0x2D1: Drop Path
0x0000
Register Reset Value:
Table 184. Add/Drop TCM TTI Generator FIFO Pointer Values Register 2
Reset
Value
Bit
Name
Access
Description
15:11
[ADD/DROP]_TCM3_TTI_PNT
R/W
This field is a pointer to the FIFO in Table 188 that holds the
TCM3 TTI values. This pointer is used for both read and
write operations and is automatically incremented by 1 after
any read or write operation.
00000
00000
00000
0
10:6
5:1
[ADD/DROP]_TCM2_TTI_PNT
[ADD/DROP]_TCM1_TTI_PNT
Reserved
R/W
R/W
RO
This field is a pointer the FIFO in Table 189 that holds the
TCM2 TTI values. This pointer is used for both read and
write operations and is automatically incremented by 1 after
any read or write operation.
This field is a pointer the FIFO in Table 190 that holds the
TCM1 TTI values. This pointer is used for both read and
write operations and is automatically incremented by 1 after
any read or write operation.
0
3.6.32
Add/Drop TCM6 TTI Generator FIFO Access Register
This register provides access to a 32-word deep, 16-bit wide FIFO that holds the TTI values to be
inserted into the TCM6 field if provisioned. The FIFO has one configurable pointer for both read and
write operations shown in Table 183. Each time a read or write operation occurs at this address (0x852
Add or 0x2D2 Drop), the pointer is automatically incremented by 1. The value of n is in the range from
0 to 63, and each of the 32 registers in the FIFO contains two 8-bit values for TTI. The values that reside
in the FIFO’s 64 eight-bit fields are the values that are inserted into the outgoing TTI field on a rotating
basis. The 64-byte TTI signal is aligned with the OTU MFAS. Byte 0 of the 64-byte TTI signal is
present at OTU multiframe positions 00, 40, 80, and C0 (hex).
Address:
0x852: Add Path
0x2D2: Drop Path
0x0000
Register Reset Value:
Table 185. Add/Drop TCM6 TTI Generator FIFO Access Register
Reset
Value
Bit
Name
Access
Description
15:8
[ADD/DROP]_TCM6_TTI n
(n is odd)
R/W
The value at bits [15:8] of address 11111 of the FIFO
represents TTI 63.
0x00
7:0
[ADD/DROP]_TCM6_TTI n
(n is even)
R/W
The value of bits [7:0] of address 00000 of the FIFO
represents TTI 0.
0x00
271 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
