UCC28610
www.ti.com ......................................................................................................................................... SLUS888C–JANUARY 2009–REVISED SEPTEMBER 2009
Assume a deadtime, tDT, of 5% of the total minimum switching period to allow for variations in the output
capacitance of the HVMOSFET and the leakage inductance value:
tDT = 0.05´tS( HF )
(3)
Using volt-seconds balance, set the volt-seconds on equal to the volt-seconds for demagnetizing and solve for
the on-time:
V
BULK(min) ´tON =VOUT ´NPS ´tDM
tDM = tS( HF ) - tON - tDT
VOUT ´NPS ´(tS( HF ) - tDT
(4)
(5)
)
tON
=
VBULK(min) + (VOUT ´NPS )
(6)
The maximum input power, PIN, to the converter, in addition to being equal to the output power divided by the
overall efficiency, is always equal to:
2
V
BULK(min) ´ tON
(
)
POUT
P =
=
IN
efficiency
2´LM ´ tS(HF)
(7)
Solve for the primary inductance value:
2
V
BULK(min) ´tON
(
)
LM =
2´P ´tS( HF )
IN
(8)
This equation is an approximation of the primary inductance value that is the best choice to minimize the primary
side RMS current. In the actual circuit, when the resonance and delay due to leakage inductance can be
measured, the magnetizing inductance value may need to be iterated for optimized low voltage switching.
Select the CL resistor, RCL, based upon the maximum power constant of the controller, KP, The tolerance of LM
should be considered (such as 10% lower for a typical inductor) and the minimum value of LM should be used to
calculate the value of the CL resistor.
To avoid tripping the overload protection feature of the controller during the normal operating range, use the
minimum value of KP from the Electrical Characteristics Table:
KP ´LM
RCL = 33.2kW´
P
IN
(9)
Once RCL is selected, the peak DRV current is calculated using Equation 10:
100kV
IDRV(PK)
=
RCL
(10)
For high efficiency, the bias winding turn ratio, NPB, should be designed to maintain the VDD voltage above the
VGG clamp, which is equal to VGG(DISABLED), when the converter is in burst mode. If VDD discharges below this
value, minus the threshold voltage of the HVMOSFET, the HVMOSFET will turn on and linearly supply the VDD
current from the high voltage rail instead of from the bias windings. Adding a zener diode on VDD will protect
VDD from exceeding its absolute maximum rating in the event of a spike due to excess leakage inductance.
Copyright © 2009, Texas Instruments Incorporated
Submit Documentation Feedback
15
Product Folder Link(s): UCC28610
TI [ TEXAS INSTRUMENTS ]
