UCC28070-Q1
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SLUSA71A –JULY 2010–REVISED JUNE 2011
PFC Start-Up Hold Off
An additional feature designed into the UCC28070 is the "Start-Up Hold Off" logic that prevents the device from
initiating a soft-start cycle until the VAO is below the zero-power threshold (0.75 V). This feature ensures that the
SS cycle will initiate from zero-power and zero duty-cycle while preventing the potential for any significant inrush
currents due to stored charge in the VAO compensation network.
Output Over-Voltage Protection (OVP)
Because of the high voltage output and a limited design margin on the output capacitor, output over-voltage
protection is essential for PFC circuits. The UCC28070 implements OVP through the continuous monitoring of
the VSENSE voltage. In the event VVSENSE rises above 106% of regulation (3.18 V), the GDx outputs are
immediately disabled to prevent the output voltage from reaching excessive levels. Meanwhile the CAOx outputs
are pulled low in order to ensure a controlled recovery starting from 0% duty-cycle after an OVP fault is released.
Once the VVSENSE voltage has dropped below 3.08 V, the PWM operation resumes normal operation.
Zero-Power Detection
In order to prevent undesired performance under no-load and near no-load conditions, the UCC28070
zero-power detection comparator is designed to disable both GDA and GDB output in the event the VAO voltage
falls below 0.75 V. The 150 mV of hysteresis ensures that the output remains disabled until the VAO has nearly
risen back into the linear range of the multiplier (VAO ≥ 0.9 V).
Thermal Shutdown
In order to protect the power supplies from silicon failures at excessive temperatures, the UCC28070 has an
internal temperature-sensing comparator that shuts down nearly all of the internal circuitry, and disables the GDA
and GDB outputs, if the die temperature rises above 160°C. Once the die temperature falls below 140°C, the
device brings the outputs up through a typical soft start.
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