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TPS65910A3 参数 Datasheet PDF下载

TPS65910A3图片预览
型号: TPS65910A3
PDF下载: 下载PDF文件 查看货源
内容描述: 集成的电源管理单元顶部规范 [Integrated Power Management Unit Top Specification]
分类和应用:
文件页数/大小: 96 页 / 1368 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103  
TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109  
SWCS046N MARCH 2010REVISED APRIL 2012  
www.ti.com  
Bits  
Field Name  
Description  
Type  
Reset  
7
CMD  
Smart-Reflex command:  
RW  
0
when 0: VDD1_OP_REG voltage is applied  
when 1: VDD1_SR_REG voltage is applied  
(1)  
6:0  
SEL  
Output voltage (EEPROM bits) selection with GAIN_SEL = 00 (G = 1,  
RW  
See  
12.5 mV per LSB):  
SEL[6:0] = 1001011 to 1111111 : 1.5 V  
...  
SEL[6:0] = 0111111 : 1.35 V  
...  
SEL[6:0] = 0110011 : 1.2 V  
...  
SEL[6:0] = 0000001 to 0000011 : 0.6 V  
SEL[6:0] = 0000000 : Off (0.0 V)  
Note: from SEL[6:0] = 3 to 75 (dec)  
Vout = (SEL[6:0] × 12.5 mV + 0.5625 mV) × G  
(1) The reset value for this field varies with boot mode selection and the processor support. Please refer to the corresponding processor  
user guide to find the correct default value.  
Table 46. VDD1_SR_REG  
Address Offset  
Physical Address  
Description  
0x23  
Instance  
VDD1 voltage selection register for smartreflex.  
This register can be accessed by both control and smartreflex I2C interfaces depending on  
SR_CTL_I2C_SEL register bit value.  
Type  
RW  
7
6
5
4
3
2
1
0
Reserved  
SEL  
Bits  
Field Name  
Description  
Type  
Reset  
7
Reserved  
Reserved bit  
RO  
R returns  
0s  
0
(1)  
6:0  
SEL  
Output voltage (EEPROM bits) selection with GAIN_SEL = 00 (G = 1,  
RW  
See  
12.5 mV per LSB):  
SEL[6:0] = 1001011 to 1111111 : 1.5V  
...  
SEL[6:0] = 0111111 : 1.35V  
...  
SEL[6:0] = 0110011 : 1.2V  
...  
SEL[6:0] = 0000001 to 0000011 : 0.6V  
SEL[6:0] = 0000000 : Off (0.0V)  
Note: from SEL[6:0] = 3 to 75 (dec)  
Vout = (SEL[6:0] × 12.5 mV + 0.5625 mV) × G  
(1) The reset value for this field varies with boot mode selection and the processor support. Please refer to the corresponding processor  
user guide to find the correct default value.  
Table 47. VDD2_REG  
Address Offset  
Physical Address  
Description  
Type  
0x24  
Instance  
VDD2 control register  
RW  
7
6
5
4
3
2
1
0
VGAIN_SEL  
ILMAX  
TSTEP  
ST  
66  
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Copyright © 2010–2012, Texas Instruments Incorporated  
Product Folder Link(s): TPS65910 TPS65910A TPS65910A3 TPS659101 TPS659102 TPS659103 TPS659104  
TPS659105 TPS659106 TPS659107 TPS659108 TPS659109  
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