TMS320TCI6487
TMS320TCI6488
Communications Infrastructure Digital Signal Processor
SPRS358F–APRIL 2007–REVISED AUGUST 2008
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Table 8-54. Timer Input Selection Register (TINPSEL) Field Descriptions (continued)
Bit
Field
Value Description
Input Select for TIMER 2 High
TIMI0
11:10 TINPHSEL2
00
01
10
11
TIMI1
FSEVT2
FSEVT3
9:8
7:6
5:4
3:2
1:0
TINPLSEL2
TINPHSEL1
TINPLSEL1
TINPHSEL0
TINPLSEL0
Input Select for TIMER 2 Low
00
01
10
11
TIMI0
TIMI1
FSEVT2
FSEVT3
Input Select for TIMER 1 High
00
01
10
11
TIMI0
TIMI1
FSEVT2
FSEVT3
Input Select for TIMER 1 Low
00
01
10
11
TIMI0
TIMI1
FSEVT2
FSEVT3
Input Select for TIMER 0 High
00
01
10
11
TIMI0
TIMI1
FSEVT2
FSEVT3
Input Select for TIMER 0 Low
00
01
10
11
TIMI0
TIMI1
FSEVT2
FSEVT3
154
Peripheral Information and Electrical Specifications
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