Functional Overview
†
Table 3−7. Peripheral Frame 2 Registers
NAME
ADDRESS RANGE
SIZE (x16)
ACCESS TYPE
0x00 7000
0x00 700F
reserved
16
0x00 7010
0x00 702F
System Control Registers
reserved
32
16
EALLOW Protected
0x00 7030
0x00 703F
0x00 7040
0x00 704F
SPI-A Registers
SCI-A Registers
reserved
16
Not EALLOW Protected
Not EALLOW Protected
0x00 7050
0x00 705F
16
0x00 7060
0x00 706F
16
0x00 7070
0x00 707F
External Interrupt Registers
reserved
16
Not EALLOW Protected
0x00 7080
0x00 70BF
64
0x00 70C0
0x00 70DF
GPIO Mux Registers
GPIO Data Registers
ADC Registers
reserved
32
EALLOW Protected
0x00 70E0
0x00 70FF
32
Not EALLOW Protected
Not EALLOW Protected
0x00 7100
0x00 711F
32
0x00 7120
0x00 73FF
736
64
0x00 7400
0x00 743F
EV-A Registers
reserved
Not EALLOW Protected
Not EALLOW Protected
Not EALLOW Protected
Not EALLOW Protected
0x00 7440
0x00 74FF
192
64
0x00 7500
0x00 753F
EV-B Registers
reserved
0x00 7540
0x00 774F
528
16
0x00 7750
0x00 775F
SCI-B Registers
reserved
0x00 7760
0x00 77FF
160
64
0x00 7800
0x00 783F
McBSP Registers
reserved
0x00 7840
0x00 7FFF
1984
†
Peripheral Frame 2 only allows 16-bit accesses. All 32-bit accesses are ignored (invalid data may be returned or written).
42
SPRS174L
April 2001 − Revised December 2004
TI [ TEXAS INSTRUMENTS ]
