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TMS320F2812PGFQ 参数 Datasheet PDF下载

TMS320F2812PGFQ图片预览
型号: TMS320F2812PGFQ
PDF下载: 下载PDF文件 查看货源
内容描述: 数字信号处理器 [Digital Signal Processors]
分类和应用: 微控制器和处理器外围集成电路数字信号处理器装置PC可编程只读存储器时钟
文件页数/大小: 162 页 / 1979 K
品牌: TI [ TEXAS INSTRUMENTS ]
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Functional Overview  
The operation and timing of the external interface, can be controlled by the registers listed in Table 3−9.  
Table 3−9. XINTF Configuration and Control Register Mappings  
NAME  
XTIMING0  
XTIMING1  
XTIMING2  
XTIMING6  
XTIMING7  
XINTCNF2  
XBANK  
ADDRESS  
0x00 0B20  
0x00 0B22  
0x00 0B24  
0x00 0B2C  
0x00 0B2E  
0x00 0B34  
0x00 0B38  
0x00 0B3A  
SIZE (x16)  
DESCRIPTION  
2
2
2
2
2
2
1
1
XINTF Timing Register, Zone 0 can access as two 16-bit registers or one 32-bit register  
XINTF Timing Register, Zone 1 can access as two 16-bit registers or one 32-bit register  
XINTF Timing Register, Zone 2 can access as two 16-bit registers or one 32-bit register  
XINTF Timing Register, Zone 6 can access as two 16-bit registers or one 32-bit register  
XINTF Timing Register, Zone 7 can access as two 16-bit registers or one 32-bit register  
XINTF Configuration Register can access as two 16-bit registers or one 32-bit register  
XINTF Bank Control Register  
XREVISION  
XINTF Revision Register  
3.5.1 Timing Registers  
XINTF signal timing can be tuned to match specific external device requirements such as setup and hold times  
to strobe signals for contention avoidance and maximizing bus efficiency. The timing parameters can be  
configured individually for each zone. This allows the programmer to maximize the efficiency of the bus, based  
on the type of memory or peripheral that the user needs to access. All XINTF timing values are with respect  
to XTIMCLK, which is equal to or one-half of the SYSCLKOUT rate, as shown in Figure 6−29.  
For detailed information on the XINTF timing and configuration register bit fields, see the TMS320x281x DSP  
External Interface (XINTF) Reference Guide (literature number SPRU067).  
3.5.2 XREVISION Register  
The XREVISION register contains a unique number to identify the particular version of XINTF used in the  
product. For the 2812, this register will be configured as described in Table 3−10.  
Table 3−10. XREVISION Register Bit Definitions  
BIT(S)  
NAME  
TYPE  
RESET  
DESCRIPTION  
Current XINTF Revision. For internal use/reference. Test purposes only. Subject to  
change.  
15−0  
REVISION  
R
0x0004  
45  
April 2001 − Revised December 2004  
SPRS174L  
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