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ꢊ ꢋꢌ ꢍꢎꢏꢐꢑ ꢋ ꢒꢀ ꢎꢋ ꢓꢋ ꢀꢔꢕ ꢂꢋ ꢓ ꢒꢔꢕ ꢐꢖ ꢑ ꢇꢍ ꢂ ꢂꢑ ꢖ
SPRS080F − MARCH 1999 − REVISED OCTOBER 2008
McBSP control registers and subaddresses
The control registers for the multichannel buffered serial port (McBSP) are accessed using the subbank
addressing scheme. This allows a set or subbank of registers to be accessed through a single memory location.
The McBSP subbank address register (SPSA) is used as a pointer to select a particular register within the
subbank. The McBSP data register (SPSDI) and the DMA autoincrement subaddress register (SPSDN) register
are used to access (read or write) the selected register. Table 11 shows the McBSP control registers and their
corresponding subaddresses.
Table 11. McBSP Control Registers and Subaddresses
McBSP0
McBSP1
McBSP2
SUB-
NAME
ADDRESS
NAME
ADDRESS
NAME
ADDRESS
ADDRESS
DESCRIPTION
SPCR10
SPCR20
RCR10
39h
39h
39h
39h
39h
39h
39h
39h
39h
39h
39h
39h
39h
39h
39h
SPCR11
SPCR21
RCR11
49h
49h
49h
49h
49h
49h
49h
49h
49h
49h
49h
49h
49h
49h
49h
SPCR12
SPCR22
RCR12
35h
35h
35h
35h
35h
35h
35h
35h
35h
35h
35h
35h
35h
35h
35h
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
Serial port control register 1
Serial port control register 2
Receive control register 1
RCR20
RCR21
RCR22
Receive control register 2
XCR10
XCR11
XCR12
Transmit control register 1
XCR20
XCR21
XCR22
Transmit control register 2
SRGR10
SRGR20
MCR10
MCR20
RCERA0
RCERB0
XCERA0
XCERB0
PCR0
SRGR11
SRGR21
MCR11
MCR21
RCERA1
RCERB1
XCERA1
XCERB1
PCR1
SRGR12
SRGR22
MCR12
MCR22
RCERA2
RCERA2
XCERA2
XCERA2
PCR2
Sample rate generator register 1
Sample rate generator register 2
Multichannel register 1
Multichannel register 2
Receive channel enable register partition A
Receive channel enable register partition B
Transmit channel enable register partition A
Transmit channel enable register partition B
Pin control register
DMA subbank addressed registers
The direct memory access (DMA) controller has several control registers associated with it. The main control
register (DMPREC) is a standard memory-mapped register. However, the other registers are accessed using
the subbank addressing scheme. This allows a set or subbank of registers to be accessed through a single
memory location. The DMA subbank address (DMSA) register is used as a pointer to select a particular register
within the subbank, while the DMA subbank data (DMSD) register or the DMA subbank data register with
autoincrement (DMSDI) is used to access (read or write) the selected register.
When the DMSDI register is used to access the subbank, the subbank address is automatically
postincremented so that a subsequent access affects the next register within the subbank. This autoincrement
feature is intended for efficient, successive accesses to several control registers. If the autoincrement feature
is not required, the DMSDN register should be used to access the subbank. Table 12 shows the DMA controller
subbank addressed registers and their corresponding subaddresses.
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