ꢀ ꢁꢂ ꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢄꢅ
ꢊ ꢋꢌ ꢍꢎꢏꢐꢑ ꢋ ꢒꢀ ꢎꢋ ꢓꢋ ꢀꢔꢕ ꢂꢋ ꢓ ꢒꢔꢕ ꢐꢖ ꢑ ꢇꢍ ꢂ ꢂꢑ ꢖ
SPRS080F − MARCH 1999 − REVISED OCTOBER 2008
IDLE3 power-down mode
The IDLE1 and IDLE2 power-down modes operate as described in the TMS320C54x DSP Reference Set,
Volume 1: CPU and Peripherals (literature number SPRU131). The IDLE3 mode is special in that the clocking
circuitry is shut off to conserve power. The 5420 cannot enter an IDLE3 mode unless both subsystems execute
an IDLE3 instruction. The power-reduced benefits of IDLE3 cannot be realized until both subsystems enter the
IDLE3 state and the internal clocks are automatically shut off. The order in which subsystems enter IDLE3 does
not matter.
emulating the 5420 device
The 5420 is a single device, but actually consists of two independent subsystems that contain register/status
information used by the emulator tools. The emulator tools must be informed of the multicore device by
modifying the board.cfg file. The board.cfg file is an ASCII file that can be modified with most editors. This
provides the emulator with a description of the JTAG chain. The board.cfg file must identify two processors when
using the 5420. The file contents would look something like this:
“CPU_B” TI320C5xx
“CPU_A” TI320C5xx
Use the compose program to make this file into a binary file (board.dat), readable by the emulation tools. Place
the board.dat file in the directory that contains the emulator software.
The subsystems are serially connected together internally. Emulation information is serially transmitted into the
device using TDI. The device responds with serial scan information transmitted out the TDO pin.
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